Product

One workspace for the full hardware loop.

A generic AI answers from training data. Prescaler answers from your SVD, your ELF, and your live debug session.

Reads real state

Every answer is pulled live off your chip, not guessed from training data, and says exactly where it came from.

One surface

Edit, build, flash, debug, and serial in one app. No context lost switching tools.

Runs on your machine

A real desktop app, not a browser tab. Local work stays fast, with nothing waiting on a network round trip.

01

Peripheral Browser

Every register on the chip, indexed from the SVD before you type a word. Pause a debug session and fields read live off the target.

Peripheral Browser25 peripherals shown
Filter peripherals…
Bring-up Catalog4 hand-verified parts with wiring notes and driver generation.
02

HardwarePilot

The agent that reads all of the above. Every answer cites which tool ran and which register or symbol it came from, live in the same window as the code.

HardwarePilot3 tool calls · STM32F405 SVD
03

RTOS

Live FreeRTOS and Zephyr task state read out of target memory while execution is paused: priority, stack high-water mark, and a SystemView-style event trace.

Kernel inspectionFreeRTOS tasks
Event trace (SEGGER SystemView)
vLEDTaskstart_exec0.0 ms
vUARTTaskstart_exec0.5 ms
IDLEstart_exec0.8 ms
ISR 36ISR 36 enter1.2 ms
vLEDTaskstart_exec1.5 ms
Task snapshot (3 tasks)Low-stack threshold: 32 free words.
NameStatePriorityHandleStack free
vLEDTaskRunning20x20001A40128 words
vUARTTaskBlocked10x20001B80212 words
IDLEReady00x20001CC056 words
04

ELF Browser

DWARF-backed symbol and section inspection on the actual built binary. Sizes and addresses come from the ELF you just linked, not a guess.

ELF BrowserELF32
stm32f405-blinky.elf
NameAddrSize
.text0x080000008.5 KB
.rodata0x08002214588 B
.data0x20000000312 B
.bss0x200001384.0 KB
.heap0x20001138512 B
.stack0x200013381.0 KB
.debug_info21.0 KB
.debug_frame2.1 KB
NameTypeAddrSize
xTaskIncrementTickFUNC0x080007A0412 B
xQueueGenericSendFUNC0x08000D50288 B
prvCheckTasksWaitingTerminationFUNC0x08000B20256 B
vTaskSwitchContextFUNC0x08000620212 B
uart_printfFUNC0x08001A30188 B
led_toggleFUNC0x08001B6048 B
pxCurrentTCBOBJECT0x200001A04 B
xSchedulerRunningOBJECT0x200001A44 B
05

Logic Analyzer

Import a sigrok capture and decode I2C, SPI, or UART frames against the same timeline as your debug session.

Logic Analyzer
Samples 500KChannels 2Protocol I2CDecoded8 frames
SCLPA5
SDAPA6
Decoded frames · BMP280 chip_id read
0.000 msSTARTS
0.005 msADDR0x76 W
0.010 msDATAACK 0xD0chip_id register
0.018 msRESTARTSr
0.023 msADDR0x76 R
0.030 msDATA0x60BMP280 id=0x60 ✓
0.035 msNAKNAK
0.040 msSTOPP
06

Core Dump

Capture a full register and memory snapshot at a fault or breakpoint, and hand it to HardwarePilot for offline analysis later.

Core Snapshot
Call stack
HardFault_Handler0x080001B0
startup_stm32f405.s:41
r00x00000000
r10x20000428
r20x00000001
r30xDEADBEEF
r40x00000000
r50x00000000
r60x00000000
r70x200003AC
r80x00000000
r90x00000000
r100x00000000
r110x00000000
r120x00000001
sp0x20001FC0
lr0xFFFFFFF9
pc0x080001B0
xpsr0x01000000
msp0x20001FC0
07

Build Config

CMake and PlatformIO build targets, flash and RAM usage, and toolchain status in the same window as the code that produced them.

Build Config
Build variantDebug
Enable Logging (vLogTask heartbeat over UART)
Enable Watchdog (real IWDG bring-up)
CMake
cmake -S . -B build -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_BUILD_TYPE=Debug -DENABLE_LOGGING=ON

Your editor, debugger, and hardware in one loop.

Full chip support matrix